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91207 ti im b8-9167 no.a0904-1/22 specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. la74310lp overview the la74310lp is an av interface ic fo r digital still cameras (dscs). it incorp orates all the functions necessary for analog audio signal processing for microphone and loudspeaker amplifiers. it also incorporates video output drivers that require no output coupling capacity. the ic is ideal for reducing the number of components and further miniaturization of digital still cameras. features audio interface block ? three-wire type serial communication ? mic amp, mic power supply incorporated (with built-in pull-up resistor) ? alc ? pb input method: analog or digital for inputting ( ? ) signal ? 3rd order lpf (for rec/pb switching control, option of fc=4khz or 11khz) ? speaker amp (the beep signal can be mixed.), with electronic volume (controlled by serial communication) ? line output (with serial mute) ? standby control (current drain < 10 a) video driver block ? not requires output coupling capacity ? low voltage drive (v cc =2.7v to 3.6v) ? v sag does not occur ? 6th order lpf (fc=9mhz) is built-in. ? 0 a current dissipation on standby mode. ? 3 ways amplifier gains (6, 12, 16db) can be selected. (pin control (gnd/open/v cc )) ? the video output has the capacity where one load of 75 impedance can be driven. ordering number : ena0904 monolithic linear ic audio interface for dsc + video driver
la74310lp no.a0904-2/22 specifications maximum ratings at ta=25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 4.0 v allowable power dissipation pd max ta 80 c * 550 mw operating temperature topr -10 to +80 c storage temperature tstg -55 to +150 c * substrate mounting condition (40mm 50mm 0.8mm: glass epoxy) 2s2p (four layers substrate) operating conditions at ta = 25 c parameter symbol conditions ratings unit v cc 3.1 v v cc a 3.0 v recommended supply voltage v cc sp 3.3 v v cc 2.7 to 3.6 v v cc a 2.7 to 3.6 v allowable operating voltage range v cc sp take care not to exceed pd max. 2.7 to 3.6 v electrical characteristics of audio block at ta=25 c, v cc a=3.0v, v cc sp=3.3v, f=1khz, with the vref capacitance charging circuit in the off mode ratings parameter symbol conditions min typ max unit circuit current v cc a current dissipation at no signal 1 i cc a1 v cc a=3.0v 7 9.4 11.8 ma v cc a current dissipation at no signal 2 i cc a2 v cc a=3.0v: rec block (mic/alc/rec amp) power save mode 5 6.7 8.4 ma v cc a current dissipation at no signal 3 i cc a3 v cc a=3.0v: line amp power save mode 6.5 8.7 10.9 ma v cc a standby current dissipation i cc as v cc a=3.0v: during standby control (23pin=0v application) 1 a current dissipation at no signal 5 i cc sp1 v cc sp=3.3v: spk power on mode 1.2 2.5 5 ma current dissipation at no signal 6 i cc sp2 v cc sp=3.3v: spk power save mode 0.05 0.1 ma v cc sp standby current dissipation i cc sps v cc sp=3.3v: during standby control (23pin=0v application) 5.5 10 a rec output system rec reference output level vor alc in, v in =-49dbv -16.5 -15.5 -14.5 dbv rec reference output distortion hdr alc in, v in =-49dbv, thd: from 2nd to 5th harmonic 0.05 0.1 % alc characteristics 1 alm1 alc in, v in =-33dbv (standard+16db) -11 -8 -5 dbv alc distortion 1 almd1 alc in, v in =-33dbv (standard+16db), thd: from 2nd to 5th harmonic 0.15 0.5 % alc characteristics 2 alm2 alc in, v in =-17dbv (standard+32db) -11 -8 -5 dbv alc distortion 2 almd2 alc in, v in =-17dbv (standard+32db), thd: from 2nd to 5th harmonic 0.2 1 % alc in max input level vinrmx alc in level at which rec output thd (from 2nd to 5th harmonic) becomes 3% or less. -10 dbv rec output noise voltage vnor alc in, no input, jis-a filter -77 -68 dbv rec output frequency characte ristics 1 feqr1 alc in, v in =-33dbv, comparison of f=4khz/1khz -5 -3.5 -2 db rec output frequency characte ristics 2 feqr2 alc in, v in =-33dbv, comparison of f=22khz/1khz -33 -25 db rec output frequency characte ristics 3 feqr3 alc in, v in =-33dbv, comparison of f=100khz/1khz -60 -55 db continued on next page.
la74310lp no.a0904-3/22 continued from preceding page. ratings parameter symbol conditions min typ max unit line output system line reference output level vol pb in, v in =-15dbv -12 -11 -10 dbv line reference output distortion rate hdl pb in, v in =-15dbv, thd: from 2nd to 5th harmonic 0.1 0.2 % line reference output noise voltage vnol pb in, no input , jis-a filter -85 -77 dbv pb in max input level vinpmx pb in level at which line output thd (from 2nd to 5th harmonic) becomes 3% or less. -5 dbv line output frequency characteristics 1 feqp1 pb in, v in =-8dbv, comparison of f=4khz/1khz -5 -3.5 -2 db line output frequency characteristics 2 feqp2 pb in, v in =-8dbv, comparison of f=22khz/1khz -33 -25 db line output frequency characteristics 3 feqp3 pb in, v in =-8dbv, comparison of f=100khz/1khz -65 -60 db line output level ( ? mode) vidvol pb in, pwm signals, digital input mode (see supplements: p.8 note26) -13 -11.5 -10 dbv sp output system (sp load = as measured at both ends of 8 ) sp reference output level1 (vol.max) vosp1 pb in, v in =-15dbv, vol=max (serial data=31) -5 -2 1 dbv sp reference output distortion thdsp pb in, v in =-15dbv, vol=max, thd: from 2nd to 5th harmonic 0.4 1 % sp reference output level2 (vol.typ) vosp2 pb in, v in =-15dbv, vol=typ (serial data=17) -19 -13 -7 dbv sp reference output level3 (vol.min) vosp3 pb in, v in =-15dbv, vol=min (serial data=0), jis-a filter -80 -70 dbv sp reference output noise voltage vnosp pb in, no input, vol=m ax, jis-a filter -76 -70 dbv sp maximum ratings output vomsp pb in, vol=max, level at which thd=10% 200 340 mw mic output system mic voltage gain vgmic mic in, v in =-39dbv 19 20 21 db mic output distortion hdmic mic in, v in =-39dbv, thd: from 2nd to 5th harmonic 0.02 0.1 % mic output noise voltage vnomic mi c in, no input, jis-a filter -94 -83 dbv mic in max input level vinmmx mic in level at which the mic output thd (from 2nd to 5th harmonic) becomes 3% or less. -22 dbv mic v cc output voltage vmic at 6.2k load 1.5 1.7 1.9 v control system serial clock frequency fclk 1.25 1.5 mhz serial input low level serlo 0 0.7 v serial input high level serhi 2.3 3.5 v
la74310lp no.a0904-4/22 electrical characteristics of video block at ta=25 c, v cc =3.1v ratings parameter symbol conditions min typ max unit circuit current v cc current dissipation 1 (v in =white50%) i cc input=white50%, 34pin=low 14 22 30 ma v cc current dissipation 2 (non-signal mode) i cc 2 input=no input, 34pin=low 7 11.5 15 ma v cc current dissipation 3 (standby mode) i cc -stby 34pin=open (high) 0 5 a video block voltage gain v6 vg-l v in =1vpp 100% white, 32pin=low (gnd) 5.7 6.2 6.7 db voltage gain v12 vg-m v in =0.5vpp 100% white, 32pin=mid (open) 11.7 12.2 12.7 db voltage gain v16 vg-h v in =0.317vpp 100% white, 32pin=high (v cc ) 15.7 16.2 16.7 db frequency characteristic s vf f=100khz/5mhz -1.5 -0.5 +0.5 db dg / differential gain dg v out =2vpp (modulated ramp) -2.0 0.0 +2.0 % dp / differential phase dp v out =2vpp (modulated ramp) -2.0 0.0 +2.0 deg control pin block standby control pin h voltage (set=standby mode) vth-stby-h voltage range of the pin 34 to achieve i cc 5 a v cc -0.5 v cc v standby control pin l voltage (set=active mode) vth-stby-l voltage range of the pin 34 to achieve active mode gnd 0.3 v gain selection control pin h voltage (set=16db) vth-g-h voltage range of the pin 32 to achieve an amp. gain of 16db v cc -0.3 v cc v gain selection control pin m voltage (set=12db) vth-g-m voltage range of the pin 32 to achieve an amp. gain of 12db 1.0 1.2 (open) 1.4 v gain selection control pin l voltage (set=6db) vth-g-l voltage range of the pin 32 to achieve an amp. gain of 6db gnd 0.3 v package dimensions unit : mm (typ) 3302a sanyo : vqlp40(5.0x5.0) 0.2 0.4 5.0 5.0 0.85max 0.05 0 nom 1 10 11 20 21 30 31 40 0.35 0.35 (0.7) (0.7) bottom view top view
la74310lp no.a0904-5/22 description of the content of serial communication data no. parameter default 0 dummy 0 1 lpf cut-off frequency sw 0:11khz, 1:4khz 1 2 vref capacitor charging circuit control sw 0:on, 1:off 0 3 mic amp power sw 0:on, 1:off 0 4 alc amp power sw 0:on, 1:off 0 5 lpf1 mode sw 0:pb mode1, 1:rec mode 0 6 lpf1/lpf2 selection sw 0:lpf1, 1:lpf2 0 7 rec block power sw 0:on, 1:off 0 8 line out power sw 0:on, 1:off 1 9 line mute sw 0:on, 1:off 0 10 spk power sw 0:on, 1:off 1 11 data=1 1 1 1 1 1: vol max 0 12 data=2 to 0 13 data=4 0 0 0 0 0: vol min (mute) 0 14 data=8 * evr setting (the numeral shown in the left is decimal. 0 15 data=16 for characteristics, see p12.) 0 serial transmission timing ? f max (max clock frequency) 1.5mhz ? t wl (clock pulse width: low) 333ns or more ? t wh (clock pulse width: high) 333ns or more ? t cs (chip enable setup time) 333ns or more ? t ch (chip enable hold time) 333ns or more ? t ds (data setup time) 333ns or more ? t dh (data hold time) 333ns or more ? t wc (chip enable pulse width) 333ns or more ? v ih (high voltage lower limit) 2.3v to 3.5v ? v il (low voltage upper limit) 0v to 0.7v f max t wh cs clock t cs t wl t ch data lsb t ds t dh msb t wc v il v ih v ih v il v ih v il
la74310lp no.a0904-6/22 power on condition (serial communication) the power on reset state covers a period up to the rise f of the second c.s. input after fall d of power on pulse c generated inside ic when the power is applied and the standby control is canceled. e is the dummy communication. actually, because of delay of several hundreds ns in the ic, the first data condition begins in g and the normal serial communication condition begins after g . high period for about 2ms delay of several hundreds ns serial communication condition dummy communication power supply h l standby control (pin no 23) high to cancel standby power on pulse (ic inside) c d c.s. e f g power on reset (ic inside) first data hold first data communication h l h l h l h l power on reset state
la74310lp no.a0904-7/22 method of measuring electric ch aracteristics of audio block at ta=25 c, v cc l=3.0v, v cc sp=3.3v, f=1khz vref capacitor charging circuit off mode 15 evr16 data 0:off 1:on 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 evr8 data 0:off 1:on 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13 evr4 data 0:off 1:on 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 evr2 data 0:off 1:on 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 evr1 data 0:off 1:on 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 spk p sw 0:on 1:off 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 9 line mute 0:on 1:off 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 line p sw 0:on 1:off 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 7 rec p sw 0:on 1:off 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 lpf modesw (1,*):rec (0,0):pb analog (0,1):pb digital 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 4 alc p sw 0:on 1:off 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 mic p sw 0:on 1:off 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 chrg p sw 0:on 1:off 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 lpf c sw 0:11khz 1:4khz 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 serial control setting 0 dmy * * 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 standby pin voltage applied to pin 23 3.3v 3.3v 3.3v 0v 3.3v 3.3v 0v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v major conditions (for the serial control setting, see the table in the right) vref capacitance charging circuit in the off mode vref capacitance charging circuit in the off mode mic/alc/rec amp power save mode vref capacitance charging circuit in the off mode line amp power save mode with the standby pin (23pin)=0v vref capacitance charging circuit in the off mode spk amp on mode vref capacitance charging circuit in the off mode spk amp power save mode with the standby pin (23pin)=0v 400 to 20khz lpf used 400 to 20khz lpf used thd: from 2nd to 5th harmonic 400 to 20khz lpf used 400 to 20khz lpf used thd: from 2nd to 5th harmonic 400 to 20khz lpf used 400 to 20khz lpf used thd: from 2nd to 5th harmonic 400 to 20khz lpf used pin 7 level at which pin 5 becomes thd = 3% (from 2nd to 5th harmonic) jis-a filter used f=4khz/1khz level ratio f=22khz/1khz level ratio f=100khz/1khz level ratio output pin 29 29 29 29 16 16 16 5 5 5 5 5 5 5 & 7 5 5 5 5 conditions v cc a=3.0v no input v cc a=3.0v no input v cc a=3.0v no input v cc a=3.0v no input v cc sp=3.3v no input v cc sp=3.3v no input v cc sp=3.3v no input v in =-49dbv f=1khz v in =-49dbv f=1khz v in =-33dbv f=1khz v in =-33dbv f=1khz v in =-17dbv f=1khz v in =-17dbv f=1khz f=1khz no input v in =-33dbv f=4khz v in =-33dbv f=22khz v in =-33dbv f=100khz input pin 29 29 29 29 16 16 16 7 7 7 7 7 7 7 7 7 7 7 symbol i cc a1 i cc a2 i cc a3 i cc as i cc s1 i cc s2 i cc sps vor hdr1 alm1 almd1 alm2 almd2 vinrmx vnor feqr1 feqr2 feqr3 no. circuit current 1 2 3 4 5 6 7 rec output system 8 9 10 11 12 13 14 15 16 17 18
la74310lp no.a0904-8/22 15 evr16 data 0:off 1:on 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 0 14 evr8 data 0:off 1:on 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 13 evr4 data 0:off 1:on 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 12 evr2 data 0:off 1:on 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 11 evr1 data 0:off 1:on 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 0 10 spk p sw 0:on 1:off 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 9 line mute 0:on 1:off 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 8 line p sw 0:on 1:off 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 7 rec p sw 0:on 1:off 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 6 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 5 lpf modesw (1,*):rec (0,0):pb analog (0,1):pb digital 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 alc p sw 0:on 1:off 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 3 mic p sw 0:on 1:off 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 2 chrg p sw 0:on 1:off 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 lpf c sw 0:11khz 1:4khz 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 serial control setting 0 dmy * * 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 standby p in voltage applied to pin 23 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v 3.3v major conditions (for the serial control setting, see the table in the right) 400 to 20khz lpf used 400 to 20khz lpf used thd: from 2nd to 5th harmonic jis-a filter used 400 to 20khz lpf used pin 2 level at which pin 24 becomes thd = 3% (from 2nd to 5th harmonic) f=4khz/1khz level ratio f=22khz/1khz level ratio f=100khz/1khz level ratio 400 to 20khz lpf used 400 to 20khz lpf used vol.=max 400 to 20khz lpf used vol.=max, thd: from 2nd to 5th harmonic 400 to 20khz lpf used vol.=typ jis-a filter used vol.=min jis-a filter used vol.=max 400 to 20khz lpf used level at which vol=max and thd=10% (from 2nd to 5th harmonic) 400 to 20khz lpf used 400 to 20khz lpf used thd: from 2nd to 5th harmonic jis-a filter used 400 to 20khz lpf used pin 10 level at which pin 8 becomes thd = 3% (from 2nd to 5th harmonic) pin 18:measurement of output voltage (under 6.2k load) output pin 24 24 24 24 & 2 24 24 24 24 15 17 15 17 15 17 15 17 15 17 15 17 8 8 8 8 & 10 11 conditions v in =-15dbv f=1khz v in =-15dbv f=1khz no input f=1khz v in =-8dbv f=4khz v in =-8dbv f=22khz v in =-8dbv f=100khz input pwm signal shown in figure 26 v in =-15dbv f=1khz v in =-15dbv f=1khz v in =-15dbv f=1khz v in =-15dbv f=1khz no input f=1khz v in =-39dbv f=1khz v in =-39dbv f=1khz no input f=1khz no input input pin 2 2 2 2 2 2 2 2 2 2 2 2 2 2 10 10 10 10 10 symbol vol1 hdl vnol vinpmx feqp1 feqp2 feqp3 vidvol vosp1 thdsp vosp2 vosp3 vnosp vossp vgmic hdmic vnomic vinmmx vmic no. line output system 19 20 21 22 23 24 25 26 spk output system (both ends of spk: measured with 8 ) 27 28 29 30 31 32 mic output system 33 34 35 36 37 supplements: (note 26) the line out signal level shall be vidvol when inputting the pwm waveform in figure 26 into the pin 2.
la74310lp no.a0904-9/22 figure 26. pwm waveform input into the pin 2 when measuring vidvol -1 0 1 2 3 4 0.e+00 2.e-04 4.e-04 6.e-04 8.e-04 1.e-03 1.e-03 1.e-03 2.e-03 2.e-03 2.e-03 time [s] 100% 15% voltage [v] 3.3v 0v 1khz sine wave pwm waveform input into the pin 2
la74310lp no.a0904-10/22 description of pin functions pin no. pin description pin purpose 1 v cc (power source for video) for video 2 pb input for audio 3 a gnd for audio 4 nc 5 rec output for audio 6 alc detection for audio 7 alc input for audio 8 mic output for audio 9 mic gnd for audio 10 mic input for audio 11 int power supply for mic for audio 12 ripple rejection for vrefl for audio 13 nc 14 spk gnd for audio 15 speaker positive-phase output for audio 16 v cc sp for audio 17 speaker negative-phase output for audio 18 spk gnd for audio 19 nc 20 speaker input for audio 21 mix output for audio 22 beep input for audio 23 standby control for audio 24 line output for audio 25 c.s. input for audio 26 clock input for audio 27 data input for audio 28 nc 29 v cc a for audio 30 analog gnd for video 31 nc 32 gain select pin for video 33 video input for video 34 power save mode select pin for video 35 gnd for video 36 nc 37 clock output for video 38 charge transfer for video 39 negative v cc for video 40 video output for video
la74310lp no.a0904-11/22 la74310lp internal equivalent diagra m and recommended circuit diagram nc pin handling this pin is electrically open and can be connected to gnd with no problem. however, we recommend you to make a foot pattern of a form similar to other pins to assure good balance after mounting. table 1: logic of external capacitor charging circuit serial no.2 on 0 off 1 initially ?on? table 2: lpf sw control logic serial no.5 no.6 a 1 * b 0 0 c 0 1 *) don?t care. + lpf mute evr logic mic v cc vref beepin v cc sp spk line out rec out 1bit da in to mcom v dd data clock mic in ila07164 det 28 27 25 24 23 22 21 29 30 26 20 19 18 17 16 15 14 13 12 11 3 4 6 7 8 9 10 2 1 5 31 32 33 34 35 36 37 38 39 40 alc charge lpf1 minus voltage generator standby low clockout 2.2 f 2.2 f 4.7 f 0.47 f 4.7 f 1 f 0.047 f 0.01 f 0.1 f 1 f 8 0.01 f 0.01 f 70k input zo=50k 2.2k v cc 75 video out from dac gain ctl v cc a 1 f a b c lpf2 +16db to v cc v cc n mix ratio 1:1 + - -+ nc nc nc nc nc nc cs standby high nd see table 2 see table 1
la74310lp no.a0904-12/22 table of input/output forms of la74310lp (audio block) pin no. pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 2 pb in 1.64v reference input level =-15dbv maximum input level = -5dbv in analog input mode = 3.465vpp in ? input mode pb input pin 3 a gnd 0v gnd pin for analog signal part 4 nc nc pin 5 rec out 1.50v at pb reference input output level = -15dbv rec output pin continued on next page. v cc a(=3.0v) vref 500 20k 3k 5 vrefl 17.5k 25k 7.5k v cc a(=3.0v) ? signal input mode analog signal input mode 2 la74310lp evr characteristics serial data set value (decimal numbers) evr attenuation (db) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 0 5 10 15 20 25 30
la74310lp no.a0904-13/22 continued from preceding page. pin no. pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 6 alc det alc detection pin 7 alc in 1.64v at mic reference input output level = -49dbv max input level =-10dbv alc input pin 8 mic out 1.6v at mic reference input output level = -49dbv mic output pin 9 mic gnd 0v for mic amp blocking gnd pin 10 mic in 1.64v reference input level =-69dbv maximum input level =-30dbv mic input pin 11 mic v cc 2.30v mic power pin continued on next page. 1k 500 v cc a(=3.0v) 6 500 vref 50k v cc a(=3.0v) 7 500 v cc a(=3.0v) 8 vref 1k 9.7k vrefl 500 70k v cc a(=3.0v) 10 v cc a(=3.0v) 2.2k 23k 11
la74310lp no.a0904-14/22 continued from preceding page. pin no. pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 12 vrefl 2.30v mic v cc and vrefl ripple rejection pin 13 nc nc pin 14 sp gnd 0v speaker gnd pin 15 spk out+ 1.27v at pb reference input output level = -8dbv (evr max) speaker positive-phase output pin 16 v cc sp 3.3v speaker power pin 17 20 sp out- spk in 1.27v 1.27v at pb reference input output level = -8dbv (evr max) at pb reference input output level = -8dbv (evr max) pin for output of speaker reversed phase speaker input pin 18 sp gnd 0v speaker gnd pin 19 nc nc pin 21 mix out 1.58v at pb reference input output level = -8dbv evr output pin 22 beep in 1.64v maximum input level = -8dbv continued on next page. v cc a(=3.0v) 500 200k 400 12 10k 10.7k 15 17 v cc sp(=3.3v) 10k 11k 17 v cc sp(=3.3v) 20 400 35k 21 3.9k vrefl v cc a(=3.0v) vrefl 2k 2k v cc a(=3.0v) 22
la74310lp no.a0904-15/22 continued from preceding page. pin no. pin name dc voltage ac voltage description of functions equivalent circuit diagram in pin 23 standby l standby control pin 2v or more: standby canceled 24 line out 1.52v at pb reference input output level = -11dbv line output pin 25 26 27 cs clock data cs input pin clock input pin data input pin 28 nc nc pin 29 v cc a 3.0v power pin for analog signal part table of input/output forms of la74310lp (video block) pin no. pin name dc voltage description of fu nctions equivalent circuit diagram in pin 1 v cc 2.7v to 3.6v 30 a-gnd 0v analog gnd 31 nc nc pin 32 gain ctl 1.2v gain select pin control of pin2 gain h (v cc ) ? 16db m (open) ? 12db l (gnd) ? 6db continued on next page. 1 32 35 gnd v cc 2k 0.72v 1.2v ref 2.16v 100k buf 23 45k 40k 500 25 26 27 v cc a(=3.0v) 26k vrefl 232k 10.5k 24 500
la74310lp no.a0904-16/22 continued from preceding page. pin no. pin name dc voltage description of fu nctions equivalent circuit diagram in pin 33 v in 1.1v video input terminal (sync-tip clamp (input high-impedance)) 34 p sav ctl v cc or 0v power save mode select pin control of pin4 mode h (v cc ) open or v cc 0.5v ? standby l (gnd) 0v to 0.3v ? active 35 gnd 0v 36 nc nc pin 37 clk out +3.0v 0v 38 nd +0.5v -2.6v (-v cc ) 39 v cc n 0v -2.5v (-v cc ) pin37: clock output terminal pin38: the terminal which transmits an electric charge pin39: negative v cc 40 v out 0v video output terminal (push-pull output low-impedance) v cc v in 1 33 35 gnd 200 200 2k active:on standby:off 2k 2k 26k 37pin 38pin 3v 2v 1v 0v -1v -2v -3v v cc =3.1v 39pin 2vpp -0.6v 1.4v 0v gain set: 6db 1.0vpp gain set: 12db 500mvpp gain set: 16db 317mvpp 1.05v v cc gnd 50k 50k 50k 4k 1 34 35 p sav ctl clk out gnd 37 2.4v 1 35 50k 50k 50k v cc gnd gnd 1 35 39 38 50k 100k v cc v cc in 1 40 39 v out + - 50k 50k 500 100k gnd 35 standby:high-impedance active:low-impedance v cc v cc in
la74310lp no.a0904-17/22 pop sound avoiding sequence recommended serial control settings 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 lpf chrg mic alc lpf modesw rec line line spk evr1 evr2 evr4 evr8 evr16 dmy c sw p sw p sw p sw p sw p sw mute p sw data data data data data * 0:11khz 0:on 0:on 0: on 0:on 0:on 0:on 0:on 0: off 0:off 0:off 0:off 0:off timing communication content * 1:4khz 1:off 1:off 1:off (1, *): rec (0, 0): pb analog (0, 1): pb digital 1:off 1:off 1:off 1:off 1:on 1:on 1:on 1:on 1:on t1 standby cancellation t2 dummy communication (only cs) data unnecessary t3 vref charging circuit: off 0 0/1 1 1 1 0 0/1 1 1 0 1 0 0 0 0 0 t4 speaker amp: on 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 0 0 t5 line amp: on 0 0/1 1 1 1 0 0/1 1 0 1 0 0 0 0 0 0 t6 return to the initial state 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 t7 standby control data unnecessary cs data sending timing standby pin (23pin) =don?t care =clock power supply (v cc a & v cc sp) optional a fter 10ms after 150ms (when pin 24 capacitance is 0.1 f) clock t0 t1 t2 t3 t4 t5 t6 t7 t8 1 upon standby cancellation & control (pbmode) a fter 20ms a fter 50ms after 200ms before 10ms
la74310lp no.a0904-18/22 recommended serial control settings 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 lpf chrg mic alc lpf modesw rec line line spk evr1 evr2 evr4 evr8 evr16 dmy c sw p sw p sw p sw p sw p sw mute p sw data data data data data * 0:11khz 0:on 0:on 0: on 0:on 0:on 0:on 0:on 0: off 0:off 0:off 0:off 0:off timing communication content * 1:4khz 1:off 1:off 1:off (1, *): rec (0, 0): pb analog (0, 1): pb digital 1:off 1:off 1:off 1:off 1:on 1:on 1:on 1:on 1:on t1 standby cancellation t2 dummy communication (only cs) data unnecessary t3 charging circuit & alc: off, lpf: rec 0 0/1 1 0 1 1 0 0 1 0 1 0 0 0 0 0 t4 alc: on 0 0/1 1 0 0 1 0 0 1 0 1 0 0 0 0 0 t5 return to the initial state 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 t6 standby control data unnecessary t0 t1 t2 t3 t4 t5 t6 t7 2 upon standby cancellation & control (recmode) cs data sending timing standby pin (23pin) =don?t care =clock power supply (v cc a & v cc sp) optional a fter 10ms clock a fter 20ms a fter 30ms after 200ms before 10ms
la74310lp no.a0904-19/22 recommended serial control settings 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 lpf chrg mic alc lpf modesw rec line line spk evr1 evr2 evr4 evr8 evr16 dmy c sw p sw p sw p sw p sw p sw mute p sw data data data data data * 0:11khz 0:on 0:on 0: on 0:on 0:on 0:on 0:on 0: off 0:off 0:off 0:off 0:off timing communication content * 1:4khz 1:off 1:off 1:off (1, *): rec (0, 0): pb analog (0, 1): pb digital 1:off 1:off 1:off 1:off 1:on 1:on 1:on 1:on 1:on t0 speaker amp: on 0 0/1 1 0 0 1 0/1 0 1 0 1 0 0 0 0 0 t1 pbmode: switching evr: setting 0 0/1 1 1 1 0 0/1 1 1 0 1 a a a a a t2 speaker amp: on 0 0/1 1 1 1 0 0/1 1 1 0 0 a a a a a recmode: switching evr: mute t3 speaker amp: off 0 0/1 1 0 0 1 0/1 0 1 0 1 0 0 0 0 0 t4 speaker amp: on 0 0/1 1 0 0 1 0/1 0 1 0 0 0 0 0 0 0 recommended serial control settings 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 lpf chrg mic alc lpf modesw rec line line spk evr1 evr2 evr4 evr8 evr16 dmy c sw p sw p sw p sw p sw p sw mute p sw data data data data data * 0:11khz 0:on 0:on 0: on 0:on 0:on 0:on 0:on 0: off 0:off 0:off 0:off 0:off timing communication content * 1:4khz 1:off 1:off 1:off (1, *): rec (0, 0): pb analog (0, 1): pb digital 1:off 1:off 1:off 1:off 1:on 1:on 1:on 1:on 1:on t0 pbmode: switching 0 0/1 1 1 1 0 0/1 1 1 0 1 0 0 0 0 0 t1 line amp: on line mute: off 0 0/1 1 1 1 0 0/1 1 0 1 1 0 0 0 0 0 recmode: switching t2 line amp: on line mute: off 0 0/1 1 0 0 1 0/1 0 1 0 1 0 0 0 0 0 3 rec pb (spk) switching cs t0 t1 t2 t3 t4 4 pb (spk) rec switching data sending timing =don?t care =clock clock optional after 20ms or more (capacitance between pins 20&21: 0.1 f) after 20ms or more (capacitance between pins 20&21: 0.1 f) 5 rec pb (line) switching t0 t1 t2 6 pb(line) rec switching cs data sending timing =don?t care =clock clock a fter 5ms or more
la74310lp no.a0904-20/22 note) data1 to 6 are the mute area of evr characteristics and jumped du e to no generation of pop noise. recommended serial control settings 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 lpf chrg mic alc lpf modesw rec line line spk evr1 evr2 evr4 evr8 evr16 dmy c sw p sw p sw p sw p sw p sw mute p sw data data data data data * 0:11khz 0:on 0:on 0: on 0:on 0:on 0:on 0:on 0: off 0:off 0:off 0:off 0:off timing communication content * 1:4khz 1:off 1:off 1:off (1, *): rec (0, 0): pb analog (0, 1): pb digital 1:off 1:off 1:off 1:off 1:on 1:on 1:on 1:on 1:on t0 evrdata=0 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 0 0 t1 evrdata=7 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 0 0 t2 evrdata=8 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 1 0 t3 evrdata=9 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 0 1 0 t4 evrdata=10 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 0 1 0 t5 evrdata=11 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 0 1 0 t6 evrdata=12 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 1 1 0 t7 evrdata=13 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 1 1 0 t8 evrdata=14 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 1 1 0 t9 evrdata=15 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 1 0 t10 evrdata=16 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 0 1 t11 evrdata=17 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 0 0 1 t12 evrdata=18 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 0 0 1 t13 evrdata=19 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 0 0 1 t14 evrdata=20 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 1 0 1 t15 evrdata=21 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 1 0 1 t16 evrdata=22 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 1 0 1 t17 evrdata=23 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 0 1 t18 evrdata=24 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 1 1 t19 evrdata=25 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 0 1 1 t20 evrdata=26 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 0 1 1 t21 evrdata=27 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 0 1 1 t22 evrdata=28 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 1 1 1 t23 evrdata=29 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 1 1 1 t24 evrdata=30 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 1 1 1 t25 evrdata=31 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 1 1 t0 t1 t2 t3 t4 t5 t6 t21 t19 t20 t22 t23 t24 t25 7 evr switching (min max) 0.25ms/cs cs data sending timing
la74310lp no.a0904-21/22 note) data1 to 6 are the mute area of evr characteristics and jumped du e to no generation of pop noise. recommended serial control settings 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 lpf chrg mic alc lpf modesw rec line line spk evr1 evr2 evr4 evr8 evr16 dmy c sw p sw p sw p sw p sw p sw mute p sw data data data data data * 0:11khz 0:on 0:on 0: on 0:on 0:on 0:on 0:on 0: off 0:off 0:off 0:off 0:off timing communication content * 1:4khz 1:off 1:off 1:off (1, *): rec (0, 0): pb analog (0, 1): pb digital 1:off 1:off 1:off 1:off 1:on 1:on 1:on 1:on 1:on t0 evrdata=31 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 1 1 t1 evrdata=30 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 1 1 1 t2 evrdata=29 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 1 1 1 t3 evrdata=28 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 1 1 1 t4 evrdata=27 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 0 1 1 t5 evrdata=26 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 0 1 1 t6 evrdata=25 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 0 1 1 t7 evrdata=24 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 1 1 t8 evrdata=23 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 0 1 t9 evrdata=22 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 1 0 1 t10 evrdata=21 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 1 0 1 t11 evrdata=20 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 1 0 1 t12 evrdata=19 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 0 0 1 t13 evrdata=18 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 0 0 1 t14 evrdata=17 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 0 0 1 t15 evrdata=16 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 0 1 t16 evrdata=15 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 1 0 t17 evrdata=14 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 1 1 0 t18 evrdata=13 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 1 1 0 t19 evrdata=12 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 1 1 0 t20 evrdata=11 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 0 1 0 t21 evrdata=10 0 0/1 1 1 1 0 0/1 1 1 0 0 0 1 0 1 0 t22 evrdata=9 0 0/1 1 1 1 0 0/1 1 1 0 0 1 0 0 1 0 t23 evrdata=8 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 1 0 t24 evrdata=7 0 0/1 1 1 1 0 0/1 1 1 0 0 1 1 1 0 0 t25 evrdata=0 0 0/1 1 1 1 0 0/1 1 1 0 0 0 0 0 0 0 t0 t1 t2 t3 t4 t5 t6 t21 t19 t20 t22 t23 t24 t25 8 evr switching (max min) 0.25ms/cs cs data sending timing
la74310lp no.a0904-22/22 ps this catalog provides information as of september, 2007. specifications and information herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.

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